AT45DB081E-MHN2B-T View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
AT45DB081E-MHN2B-T
Unspecified
'AT45DB081E-MHN2B-T' PDF : 69 Pages View PDF
23. Write Operations
The following block diagram and waveforms illustrate the various write sequences available.
Figure 23-1. Block Diagram
WP
Flash Memory Array
Page (256/264 bytes)
Buffer 1 (256/264 bytes)
Buffer 2 (256/264 bytes)
SCK
CS
RESET
VCC
GND
Figure 23-2. Buffer Write
I/O Interface
SI
SO
CS
SI (Input)
CMD
Binary Page Size
16 Dummy Bits + BFA7-BFA0
X
X
BFA7-0
Completes Writing into Selected Buffer
n
n+1
Last Byte
Each transition represents eight bits
n = 1st byte read
n+1 = 2nd byte read
Figure 23-3. Buffer to Main Memory Page Program
CS
SI (Input)
Starts Self-timed Erase/Program Operation
Binary Page Size
A19-A8 + 8 Dummy Bits
CMD
XXXX,A19-A16
A15-A8 XXXX XXXX
Each transition represents eight bits
AT45DB081E [PRELIMINARY DATASHEET] 54
DS-45DB081E-028C–DFLASH–10/2013
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