AT48802 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT48802' PDF : 23 Pages View PDF
Register Functions (Continued)
Function
AUX TH Delay
AUX TH 0-1
AUX TH Width
Register
10
10
11
Bit #
0-5
6-7
0-4
Port 0 bit 7 Mux
11
6
Intercom Polarity
11
7
Data Path
Delays
12
0-7
TX CHOP 0, 1
13
0-1
P0.0 OPT 0, 1
13
2-3
P0.1 OPT 0, 1
13
4-5
2-18
AT48802
Description
Same functionality as RSSI above except applies to the
AUX TH signal at pin 14 if so selected by Register 11 bit
6 (see below). See section 2.8.3. Pin 14 is dual use.
Controls a multiplexed output pin 14. 0 selects register
7 bit 6 non-inverted. 1 selects AUX TH function, see
above.
Wakeup edge sense polarity for input pin 51. 0 = down
edge, 1 = up edge sensing.
These bits set the delays in the various sub-functions of
the internal data path receiver. This allows any arbitrary
time delay in the RF module design and still optimally
detect data.
Intended to control an audio switch which disconnects
audio from the RF module modulation input during the
receive part of TDD. Pin 60.
TX CHOP 0
TX CHOP 1 TX CHOP pin 60
0
0
0
0
1
TDD
1
0
!TDD
1
1
1
Allows internal data path signals to be observed at pin 2
for engineering purposes, to assist in setting the data
path delays.
P0.0 OPT1
P0.0 OPT0
Port 0.0 muxed
function
0
0
Register 7 bit 0
0
1
RX_CLK
(me_din_smp)
1
0
Rx_LO
(delay_div512)
1
1
Dump
Equivalent function to Port 0 bit 0 above, except for Port
0 bit 1, pin 3.
P0.1 OPT1
P0.1 OPT0
Port 0.1 muxed
function
0
0
Register 7 bit 1
0
1
Demod, PSK
Demod O/P
1
0
Demod,
Integrator’s LSB
1
1
Demod, Carrier
Detector
(continued)
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