The encryption array cannot be directly verified. Verification of the encryption array is done by
observing that the code array is well encrypted.
Figure 9-2.
Programming and Verification Signal’s Waveform
Programming Cycle
A0-A12
Read/Verify Cycle
D0-D7
ALE/PROG
EA/VPP
Control signals
12.75V
5V
0V
Data In
100µs
Data Out
9.4 EPROM Erasure (Windowed Packages Only)
Erasing the EPROM erases the code array, the encryption array and the lock bits returning the
parts to full functionality.
Erasure leaves all the EPROM cells in a 1’s state (FF).
9.4.1
Erasure Characteristics
The recommended erasure procedure is exposure to ultraviolet light (at 2537 Å) to an integrated
dose at least 15 W-sec/cm2. Exposing the EPROM to an ultraviolet lamp of 12,000 µW/cm2 rat-
ing for 30 minutes, at a distance of about 25 mm, should be sufficient. An exposure of 1 hour is
recommended with most of standard erasers.
Erasure of the EPROM begins to occur when the chip is exposed to light with wavelength
shorter than approximately 4,000 Å. Since sunlight and fluorescent lighting have wavelengths in
this range, exposure to these light sources over an extended time (about 1 week in sunlight, or 3
years in room-level fluorescent lighting) could cause inadvertent erasure. If an application sub-
jects the device to this type of exposure, it is suggested that an opaque label be placed over the
window.
10. Signature Bytes
The TS83/87C51RB2/RC2/RD2 has four signature bytes in location 30h, 31h, 60h and 61h. To
read these bytes follow the procedure for EPROM verify but activate the control lines provided in
Table 31. for Read Signature Bytes. Table 10-1. shows the content of the signature byte for the
TS87C51RB2/RC2/RD2.
Table 10-1. Signature Bytes Content
Location
30h
31h
60h
Contents
58h
57h
7Ch
Comment
Manufacturer Code: Atmel
Family Code: C51 X2
Product name: TS83C51RD2
56 AT/TS8xC51Rx2
4188F–8051–01/08