AT88SC0104CA View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT88SC0104CA' PDF : 20 Pages View PDF
13.3.
Asynchronous T = 0 Protocol
This power-up sequence complies to ISO 7816-3 for a cold reset in smart card applications.
VCC goes high; RST, I/O (SDA) and CLK (SCL) are low.
Set I/O (SDA) in receive mode.
Provide a clock signal to CLK (SCL).
RST goes high after 400 clock cycles.
The device will respond with a 64-bit ATR code, including historical bytes to indicate the memory density within the
CryptoMemory family.
Once asynchronous mode has been selected, it is not possible to switch to synchronous mode without first powering
off the device.
Figure 14. Asynchronous T = 0 Protocol (Gemplus Patent)
Vcc
I/O-SDA
ATR
RST
CLK-SCL
14. Initial Device Programming
Enabling the security features of CryptoMemory requires prior personalization. Personalization entails setting up of
desired access rights by zones, passwords and key values, programming these values into the configuration memory
with verification using simple WRITE and READ commands, and then blowing fuses to lock this information in place.
Gaining access to the configuration memory requires successful presentation of a secure (or transport) code. The initial
signature of the secure (transport) code for the AT88SC0104CA device is $DD 42 97. This is the same as the WRITE 7
password. The user may elect to change the signature of the secure code anytime after successful presentation.
After writing and verifying data in the configuration memory, the security fuses MUST be blown to lock this information
in the device. For additional information on personalizing CryptoMemory, please see the application notes
Programming CryptoMemory for Embedded Applications and Initializing CryptoMemory for Smart Card Applications
from the product page at www.atmel.com/products/securemem.
16 AT88SC0104CA
5200ES–CRYPT–08/09
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