18.2 Read
Figure 18-2. Read
tCLK
Address
CLK
tCL
tOH
tCH
tOH
I/O
Note:
tDV
PGM and RST must both be low during a read cycle. I/O should not be driven (except by the external pullup resistor).
18.3 Erase/Write
Figure 18-3. Erase/Write
Read
Erase/Write
Read
Address An-1
An
An
An
An+1
tCHP
CLK
PGM
I/O
tHPR
tSPR
tDV
tDV
tOH
Output
Valid
tDS
tDH
Drive
"1" (Erase)
or "0" (Write)
Input
Valid
Output
Notes:
1. During any Erase or Write operation, PGM must fall before the falling edge of CLK at the end of tCHP (recommend a mini-
mum setup of 1 µsec).
2. After the rising edge of PGM to initiate the Erase/Write operation, delay at least tDV (2 µsec) before driving data on the I/O
contact.
20 AT88SC102
1419C–SMEM–6/08