AT90PWM2 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT90PWM2' PDF : 365 Pages View PDF
AT90PWM2/3/2B/3B
7. System Clock
7.1 Clock Systems and their Distribution
Figure 7-1 presents the principal clock systems in the AVR and their distribution. All of the clocks
need not be active at a given time. In order to reduce power consumption, the clocks to unused
modules can be halted by using different sleep modes, as described in “Power Management and
Sleep Modes” on page 41. The clock systems are detailed below.
Figure 7-1. Clock Distribution AT90PWM2/3
PSC0/1/2
General I/O
Modules
ADC
CPU Core
RAM
Flash and
EEPROM
CLKPLL
PLL
clkI/O
clkADC
AVR Clock
Control Unit
clkCPU
clkFLASH
Reset Logic
Watchdog Timer
Source Clock
Clock
Multiplexer
Watchdog Clock
Watchdog
Oscillator
External Clock
(Crystal
Oscillator)
Calibrated RC
Oscillator
29
4317K–AVR–03/2013
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