AT90PWM81 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT90PWM81' PDF : 325 Pages View PDF
AT90PWM81/161
5. System Clock and Clock Options
The Atmel AT90PWM81/161 provides a large number of clock sources. Those can be divided in
two categories: internal and external.
After reset, CKSEL fuses select one clock source. Once the device is running, software clock
switching is available on any other clock sources.
Some hardware controls are provided for clock switching management but some specific proce-
dures must be observed. Some settings may lead the user to program the device in an
inadequate configuration.
5.1 Clock Systems and their Distribution
Figure 5-1 presents the principal clock systems in the AVR and their distribution. All of the clocks
may not be active at a given time. In order to reduce power consumption, the clocks from mod-
ules not being used can be halted by using different sleep modes or by using features of the
dynamic clock switch (“Power Management and Sleep Modes” on page 45 or “Dynamic Clock
Switch” on page 35). The clock systems are detailed below.
Figure 5-1. Clock distribution.
PSC2/PSCR
General I/O
Modules
CLK PLL
PLL
clk I/O
CLK PLL /4
ADC
clk ADC
AVR Clock
Control Unit
CPU Core
clk CPU
clk FLASH
RAM
Flash and
EEPROM
Source Clock
Reset Logic
Watchdog Timer
Prescaler
Watchdog Clock
PLL Input
Multiplexer
Clock switch
CKOUT
Fuse
External Clock
(Crystal
Oscillator)
Watchdog
Oscillator
Calibrated RC
Oscillator
CLKO
XTAL1
XTAL2
5.1.1
clkCPU - CPU Clock
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
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7734Q–AVR–02/12
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