AT90S2313-10 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT90S2313-10' PDF : 92 Pages View PDF
AT90S2313
Timer/Counter0 Control
Register – TCCR0
Timer/Counter0 – TCNT0
Bit
7
6
5
4
3
2
1
0
$33 ($53)
–
–
–
–
–
CS02 CS01 CS00 TCCR0
Read/Write
R
R
R
R
R
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
• Bits 7..3 – Res: Reserved Bits
These bits are reserved bits in the AT90S2313 and always read zero.
• Bits 2,1,0 – CS02, CS01, CS00: Clock Select0, Bit 2,1 and 0
The Clock Select0 bits 2, 1, and 0 define the prescaling source of Timer/Counter0.
Table 7. Clock 0 Prescale Select
CS02
CS01
CS00 Description
0
0
0
Stop, the Timer/Counter0 is stopped.
0
0
1
CK
0
1
0
CK/8
0
1
1
CK/64
1
0
0
CK/256
1
0
1
CK/1024
1
1
0
External Pin T0, falling edge
1
1
1
External Pin T0, rising edge
The Stop condition provides a Timer Enable/Disable function. The CK down divided
modes are scaled directly from the CK Oscillator clock. If the external pin modes are
used for Timer/Counter0, transitions on PD4/(T0) will clock the counter even if the pin is
configured as an output. This feature can give the user software control of the counting.
Bit
$32 ($52)
Read/Write
Initial value
7
6
5
4
3
2
1
0
MSB
LSB
TCNT0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
The Timer/Counter0 is realized as an up-counter with read and write access. If the
Timer/Counter0 is written and a clock source is present, the Timer/Counter0 continues
counting in the timer clock cycle following the write operation.
29
0839I–AVR–06/02
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