PS: Power Saving
The AT91M40400 Power Saving module provides a low-
power Idle Mode. In Idle Mode, the CPU clock is deacti-
vated while all on-chip peripherals and the RAM remain
active. The contents of the on-chip RAM and all the special
function registers remain unchanged during this mode. The
Idle Mode can be terminated by any enabled interrupt or by
a hardware Reset.
PS User Interface
Base Address:
0xFFFF4000
Table 13. Power Saving Memory Map
Offset
Register
0x00
Control Register
Name
PS_CR
AT91M40400
Access
Write only
Reset State
0
PS Control Register
Name:
Access Type:
PS_CR
Write only
31
30
29
28
27
26
---
---
---
---
---
---
23
22
21
20
19
18
---
---
---
---
---
---
15
14
13
12
11
10
---
---
---
---
---
---
7
6
5
4
3
2
---
---
---
---
---
---
• CPU: CPU Clock Disable
0 = No effect.
1 = Disables the CPU clock.
The CPU clock is re-enabled by any enabled interrupt or by a hardware Reset.
25
24
---
---
17
16
---
---
9
8
---
---
1
0
---
CPU
111