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AT91M40400 View Datasheet(PDF) - Atmel Corporation

Part Name
Description
MFG CO.
AT91M40400
Atmel
Atmel Corporation Atmel
'AT91M40400' PDF : 116 Pages View PDF
USART Channel Status Register
Name:
Access Type:
US_CSR
Read only
31
---
23
---
15
---
7
PARE
30
---
22
---
14
---
6
FRAME
29
---
21
---
13
---
5
OVRE
28
---
20
---
12
---
4
ENDTX
27
---
19
---
11
---
3
ENDRX
26
---
18
---
10
---
2
RXBRK
25
---
17
---
9
TXEMPTY
1
TXRDY
24
---
16
---
8
TIMEOUT
0
RXRDY
• RXRDY: Receiver Ready
0 = No complete character has been received since the last read of the US_RHR or the receiver is disabled.
1 = At least one complete character has been received and the US_RHR has not yet been read.
• TXRDY: Transmitter Ready
0 = US_THR contains a character waiting to be transferred to the Transmit Shift Register, or an STTBRK command has
been requested.
1 = US_THR is empty and there is no Break request pending TSR availability.
Equal to zero when the USART is disabled or at reset. Transmitter Enable command (in US_CR) sets this bit to one.
• RXBRK: Break Received/End of Break
0 = No Break Received nor End of Break has been detected since the last “Reset Status Bits” command in the Control
Register.
1 = Break Received or End of Break has been detected since the last “Reset Status Bits” command in the Control Reg-
ister.
• ENDRX: End of Receiver Transfer
0 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the receiver is inactive.
1 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the receiver is active.
• ENDTX: End of Transmitter Transfer
0 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the transmitter is inactive.
1 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the transmitter is active.
• OVRE: Overrun Error
0 = No byte has been transferred from the Receive Shift Register to the US_RHR when RxRDY was asserted since the
last “Reset Status Bits” command.
1 = At least one byte has been transferred from the Receive Shift Register to the US_RHR when RxRDY was asserted
since the last “Reset Status Bits” command.
• FRAME: Framing Error
0 = No stop bit has been detected low since the last “Reset Status Bits” command.
1 = At least one stop bit has been detected low since the last “Reset Status Bits” command.
• PARE: Parity Error
1 = At least one parity bit has been detected false (or a parity bit high in multi-drop mode) since the last “Reset Status
Bits” command.
0 = No parity bit has been detected false (or a parity bit high in multi-drop mode) since the last “Reset Status Bits” com-
mand.
• TIMEOUT: Receiver Time-out
0 = There has not been a time-out since the last “Start Time-out” command or the Time-out Register is 0.
1 = There has been a time-out since the last “Start Time-out” command.
• TXEMPTY: Transmitter Empty
0 = There are characters in either US_THR or the Transmit Shift Register or a Break is being transmitted.
1 = There are no characters in US_THR and the Transmit Shift Register and Break is not active.
Equal to zero when the USART is disabled or at reset. Transmitter Enable command (in US_CR) sets this bit to one.
78
AT91M40400
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