AT91SAM7SE32 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT91SAM7SE32' PDF : 47 Pages View PDF
Figure 9-3. Power Management Controller Block Diagram
SLCK
MAINCK
PLLCK
Master Clock Controller
Prescaler
/1,/2,/4,...,/64
Processor
Clock
Controller
Idle Mode
Peripherals
Clock Controller
ON/OFF
SLCK
MAINCK
PLLCK
Programmable Clock Controller
Prescaler
/1,/2,/4,...,/64
PCK
int
MCK
periph_clk[2..14]
pck[0..2]
PLLCK
USB Clock Controller
ON/OFF
Divider
/1,/2,/4
usb_suspend
UDPCK
9.4 Advanced Interrupt Controller
• Controls the interrupt lines (nIRQ and nFIQ) of an ARM Processor
• Individually maskable and vectored interrupt sources
– Source 0 is reserved for the Fast Interrupt Input (FIQ)
– Source 1 is reserved for system peripherals (RTT, PIT, EFC, PMC, DBGU, etc.)
– Other sources control the peripheral interrupts or external interrupts
– Programmable edge-triggered or level-sensitive internal sources
– Programmable positive/negative edge-triggered or high/low level-sensitive external
sources
• 8-level Priority Controller
– Drives the normal interrupt nIRQ of the processor
– Handles priority of the interrupt sources
– Higher priority interrupts can be served during service of lower priority interrupt
• Vectoring
– Optimizes interrupt service routine branch and execution
– One 32-bit vector register per interrupt source
– Interrupt vector register reads the corresponding current interrupt vector
• Protect Mode
– Easy debugging by preventing automatic operations
• Fast Forcing
– Permits redirecting any interrupt source on the fast interrupt
• General Interrupt Mask
– Provides processor synchronization on events without triggering an interrupt
32 AT91SAM7SE512/256/32 [Advance Information Summary]
6222AS–ATARM–21-Aug-06
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