AT91SAM9G10-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT91SAM9G10-CU' PDF : 730 Pages View PDF
9.6 Power Management Controller
• The Power Management Controller provides:
– the Processor Clock PCK
– the Master Clock MCK
– the USB Clock USBCK (HCK0)
– the LCD Controller Clock LCDCK (HCK1)
– up to thirty peripheral clocks
– four programmable clock outputs: PCK0 to PCK3
Figure 9-3. Power Management Controller Block Diagram
SLCK
MAINCK
PLLACK
PLLBCK
Master Clock Controller
Prescaler
/1,/2,/4,...,/64
Divider
/1,/2,/3,/4
Processor
Clock
Controller
Idle Mode
APB Peripherals
Clock Controller
ON/OFF
SLCK
MAINCK
PLLACK
PLLBCK
AHB Peripherals
Clock Controller
ON/OFF
Programmable Clock Controller
Prescaler
/1,/2,/4,...,/64
PLLBCK
USB Clock Controller
ON/OFF
Divider
/1,/2,/4
PCK
int
MCK
periph_clk[2..21]
HCKx
pck[0..3]
usb_suspend
UDPCK
UHPCK
9.7 Periodic Interval Timer
• Includes a 20-bit Periodic Counter with less than 1 µs accuracy
• Includes a 12-bit Interval Overlay Counter
• Real time OS or Linux®/WindowsCE® compliant tick generator
9.8 Watchdog Timer
• 12-bit key-protected only-once programmable counter
• Windowed, prevents the processor to be in a dead-lock on the watchdog access
9.9 Real-time Timer
• 32-bit Free-running backup counter
• Alarm Register capable to generate a wake-up of the system
22 AT91SAM9G10
6462A–ATARM–03-Jun-09
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