AT91SAM9G45 View Datasheet(PDF) - Atmel Corporation
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Description
MFG CO.
'AT91SAM9G45' PDF : 1159 Pages View PDF
9.5.1 CP15 Registers Access
CP15 registers can only be accessed in privileged mode by:
• MCR (Move to Coprocessor from ARM Register) instruction is used to write an ARM register to CP15.
• MRC (Move to ARM Register from Coprocessor) instruction is used to read the value of CP15 to an ARM
register.
Other instructions like CDP, LDC, STC can cause an undefined instruction exception.
The assembler code for these instructions is:
MCR/MRC{cond} p15, opcode_1, Rd, CRn, CRm, opcode_2.
The MCR, MRC instructions bit pattern is shown below:
31
30
29
28
27
26
25
24
cond
1
1
1
0
23
22
21
20
19
18
17
16
opcode_1
L
CRn
15
14
13
12
11
10
9
8
Rd
1
1
1
1
7
6
5
4
3
2
1
0
opcode_2
1
CRm
• CRm[3:0]: Specified Coprocessor Action
Determines specific coprocessor action. Its value is dependent on the CP15 register used. For details, refer to CP15 spe-
cific register behavior.
• opcode_2[7:5]
Determines specific coprocessor operation code. By default, set to 0.
• Rd[15:12]: ARM Register
Defines the ARM register whose value is transferred to the coprocessor. If R15 is chosen, the result is unpredictable.
• CRn[19:16]: Coprocessor Register
Determines the destination coprocessor register.
• L: Instruction Bit
0 = MCR instruction
1 = MRC instruction
• opcode_1[23:20]: Coprocessor Code
Defines the coprocessor specific code. Value is c15 for CP15.
• cond [31:28]: Condition
For more details, see Chapter 2 in ARM926EJ-S TRM.
SAM9G45 [DATASHEET] 43
6438K–ATARM–12-Feb-13
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