ATEMGA128-16AI View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATEMGA128-16AI' PDF : 395 Pages View PDF
Figure 46. 16-bit Timer/Counter Block Diagram
Count
Clear
Direction
Control Logic
TCLK
Timer/Counter
TCNTx
TOP BOTTOM
=
=0
=
OCRxA
=
OCRxB
Fixed
TOP
Values
=
OCRxC
ICRx
TCCRxA
ICFx (Int.Req.)
Edge
Detector
TCCRxB
TOVx
(Int.Req.)
Clock Select
Edge
Detector
( From Prescaler )
OCFxA
(Int.Req.)
Waveform
Generation
Tx
OCxA
OCFxB
(Int.Req.)
Waveform
Generation
OCxB
OCFxC
(Int.Req.)
Waveform
Generation
OCxC
( From Analog
Comparator Ouput )
Noise
Canceler
TCCRxC
ICPx
Registers
Note: Refer to Figure 1 on page 2, Table 30 on page 73, and Table 39 on page 80 for
Timer/Counter1 and 3 pin placement and description.
The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B/C), and Input Cap-
ture Register (ICRn) are all 16-bit registers. Special procedures must be followed when
accessing the 16-bit registers. These procedures are described in the section “Access-
ing 16-bit Registers” on page 114. The Timer/Counter Control Registers (TCCRnA/B/C)
are 8-bit registers and have no CPU access restrictions. Interrupt requests (shorten as
Int.Req.) signals are all visible in the Timer Interrupt Flag Register (TIFR) and Extended
Timer Interrupt Flag Register (ETIFR). All interrupts are individually masked with the
Timer Interrupt Mask Register (TIMSK) and Extended Timer Interrupt Mask Register
(ETIMSK). (E)TIFR and (E)TIMSK are not shown in the figure since these registers are
shared by other timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock
source on the Tn pin. The Clock Select logic block controls which clock source and edge
the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is
inactive when no clock source is selected. The output from the clock select logic is
referred to as the timer clock (clkTn).
112 ATmega128
2467O–AVR–10/06
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