ATF-511P8 View Datasheet(PDF) - HP => Agilent Technologies
Part Name
Description
MFG CO.
ATF-511P8
HP => Agilent Technologies
'ATF-511P8' PDF : 16 Pages View PDF
ATF-511P8 Absolute Maximum Ratings[1]
Symbol
VDS
VGS
VGD
IDS
IGS
Pdiss
Pin max.
TCH
TSTG
θch_b
Parameter
Drain–Source Voltage[2]
Gate–Source Voltage[2]
Gate Drain Voltage[2]
Drain Current[2]
Gate Current
Total Power Dissipation[3]
RF Input Power[4]
Channel Temperature
Storage Temperature
Thermal Resistance[5]
Units
V
V
V
A
mA
W
dBm
°C
°C
°C/W
Absolute
Maximum
7
-5 to 1
-5 to 1
1
46
3
+30
150
-65 to 150
33
Notes:
1. Operation of this device in excess of any one
of these parameters may cause permanent
damage.
2. Assumes DC quiescent conditions.
3. Board (package belly) temperatureTB is 25°C.
Derate 30 mW/°C for TB > 50°C.
4. With 10 Ohm series resistor in gate supply
and 3:1 VSWR.
5. Channel-to-board thermal resistance
measured using 150°C Liquid Crystal
Measurement method.
6. Device can safely handle +30dBm RF Input
Power provided IGS limited to 46mA. IGS at
P1dB drive level is bias circuit dependent.
1000
900
800
700
600
500
400
300
200
100
0
0
2
4
VDS (V)
Figure 1. Typical I-V Curves
(Vgs = 0.1 per step).
0.8 V
0.7 V
0.6 V
0.5 V
6
8
Product Consistency Distribution Charts at 2 GHz, 4.5V, 200 mA[6,7]
240
200
Cpk = 1.66
Cpk = 3.24
200
Stdev = 0.6
160
Stdev = 0.15
160
120
-3 Std
+3 Std
120
80
80
-3 Std
+3 Std
40
40
0
0
35
38
41
44
47
28
29
30
31
OIP3 (dBm)
P1dB (dBm)
Figure 2. OIP3
LSL = 38.5, Nominal = 41.7.
Figure 3. P1dB
LSL = 28.5, Nominal = 30.
150
Cpk = 1.4
120
Stdev = 0.31
90
-3 Std
60
+3 Std
30
0
13
14
15
16
17
GAIN (dB)
Figure 4. Gain
LSL = 13.5, Nominal = 14.8, USL = 16.5.
160
Cpk = 3.03
Stdev = 1.85
120
80
-3 Std
+3 Std
40
0
52 57 62 67 72 77 82
PAE (%)
Figure 5. PAE
LSL = 52, Nominal = 68.9.
Notes:
6. Distribution data sample size is 400 samples taken from 4 different wafers and 3 different lots.
Future wafers allocated to this product may have nominal values anywhere between the upper and
lower limits.
7. Measurements are made on production test board, which represents a trade-off between optimal
OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements.
2
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