ATF-551M4 View Datasheet(PDF) - HP => Agilent Technologies
Part Name
Description
MFG CO.
ATF-551M4
HP => Agilent Technologies
'ATF-551M4' PDF : 24 Pages View PDF
R3 = VDD – Vds (1)
Ids + IBB p
VDD is the power supply voltage.
Vds is the device drain to source
voltage.
Ids is the desired drain current.
IBB is the current flowing
through the R1/R2 resistor
voltage divider network.
The value of resistors R1 and R2
are calculated with the following
formulas.
R1 = Vgs
(2)
Ip
BB
R2 = (Vds – Vgs) R1 (3)
Vgs
p
Example Circuit
VDD = 3V
Vds = 2.7V
Ids = 10 mA
Vgs = 0.47V
Choose IBB to be at least 10X the
maximum expected gate leakage
current. IBB was conservatively
chosen to be 0.5 mA for this
example. Using equations (1), (2),
and (3) the resistors are calcu-
lated as follows
R1 = 940Ω
R2 = 4460Ω
R3 = 28.6Ω
Active Biasing
Active biasing provides a means
of keeping the quiescent bias
point constant over temperature
and constant over lot to lot
variations in device dc perfor-
mance. The advantage of the
active biasing of an enhancement
mode PHEMT versus a depletion
mode PHEMT is that a negative
power source is not required. The
techniques of active biasing an
enhancement mode device are
very similar to those used to bias
a bipolar junction transistor.
An active bias scheme is shown
in Figure 2.
INPUT
Zo
C1
Q1
L1
L2
C2
R5
C3
R6
C7
Q2
R7
R1
C4
OUTPUT
Zo
L4
L3
C5
R4
C6
Vdd
R3
R2
Figure 2. Typical ATF-551M4 LNA with Active
Biasing.
R1 and R2 provide a constant
voltage source at the base of a
PNP transistor at Q2. The con-
stant voltage at the base of Q2 is
raised by 0.7 volts at the emitter.
The constant emitter voltage plus
the regulated VDD supply are
present across resistor R3.
Constant voltage across R3
provides a constant current
supply for the drain current.
Resistors R1 and R2 are used to
set the desired Vds. The combined
series value of these resistors also
sets the amount of extra current
consumed by the bias network.
The equations that describe the
circuit’s operation are as follows.
VE = Vds + (Ids • R4) (1)
R3 = VDD – VE
(2)
Ids p
VB = VE – VBE
(3)
R1
VB = R1 + R2p VDD
(4)
VDD = IBB (R1 + R2) (5)
Rearranging equation (4)
provides the following formula
R2 = R1 (VDD – VB) (4A)
VB
p
and rearranging equation (5)
provides the follow formula
R1 =
VDD
9 (5A)
( ) IBB
1+
VDD – VB p
VB
Example Circuit
VDD = 3 V
Vds = 2.7 V
Ids = 10 mA
R4 = 10Ω
VBE = 0.7 V
Equation (1) calculates the
required voltage at the emitter o
the PNP transistor based o
desired Vds and Ids throug
resistor R4 to be 2.8V. Equation
(2) calculates the value of resistor
R3 which determines the drain
current Ids. In the example
R3=18.2Ω. Equation (3) calculates
the voltage required at the junc-
tion of resistors R1 and R2. This
voltage plus the step-up of the
base emitter junction determines
the regulated Vds. Equations (4)
and (5) are solved simultaneously
to determine the value of resistors
R1 and R2. In the example
R1=4200Ω and R2 =1800Ω.
R7 is chosen to be 1 kΩ. This
resistor keeps a small amount of
current flowing through Q2 to help
maintain bias stability. R6 is
chosen to be 10 KΩ. This value of
resistance is high enough to limit
Q1 gate current in the presence of
high RF drive levels as experi-
enced when Q1 is driven to the
P1dB gain compression point. C7
provides a low frequency bypass to
keep noise from Q2 effecting the
operation of Q1. C7 is typically
0.1 µF.
Maximum Suggested Gate Current
The maximum suggested gate
current for the ATF-551M4 is
1 mA. Incorporating resistor R5
in the passive bias network or
resistor R6 in the active bias
network safely limits gate current
to 500 µA at P1dB drive levels.
In order to minimize component
count in the passive biased
amplifier circuit, the 3 resistor
bias circuit consisting of R1, R2,
and R5 can be simplified if
desired. R5 can be removed if R1
is replaced with a 5.6KΩ resistor
21
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