ATMEGA128L-8MC View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATMEGA128L-8MC' PDF : 395 Pages View PDF
Compare Match Output
Unit
The setup of the OC0 should be performed before setting the Data Direction Register for
the port pin to output. The easiest way of setting the OC0 value is to use the force output
compare (FOC0) strobe bit in normal mode. The OC0 Register keeps its value even
when changing between waveform generation modes.
Be aware that the COM01:0 bits are not double buffered together with the compare
value. Changing the COM01:0 bits will take effect immediately.
The Compare Output mode (COM01:0) bits have two functions. The waveform genera-
tor uses the COM01:0 bits for defining the Output Compare (OC0) state at the next
compare match. Also, the COM01:0 bits control the OC0 pin output source. Figure 37
shows a simplified schematic of the logic affected by the COM01:0 bit setting. The I/O
registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the Gen-
eral I/O Port Control Registers (DDR and PORT) that are affected by the COM01:0 bits
are shown. When referring to the OC0 state, the reference is for the internal OC0 Regis-
ter, not the OC0 pin.
Figure 37. Compare Match Output Unit, Schematic
COMn1
COMn0
FOCn
Waveform
Generator
DQ
1
OCn
OCn
Pin
0
DQ
PORT
DQ
Compare Output Mode and
Waveform Generation
clkI/O
DDR
The general I/O port function is overridden by the output compare (OC0) from the wave-
form generator if either of the COM01:0 bits are set. However, the OC0 pin direction
(input or output) is still controlled by the Data Direction Register (DDR) for the port pin.
The Data Direction Register bit for the OC0 pin (DDR_OC0) must be set as output
before the OC0 value is visible on the pin. The port override function is independent of
the waveform generation mode.
The design of the output compare pin logic allows initialization of the OC0 state before
the output is enabled. Note that some COM01:0 bit settings are reserved for certain
modes of operation. See “8-bit Timer/Counter Register Description” on page 103.
The waveform generator uses the COM01:0 bits differently in normal, CTC, and PWM
modes. For all modes, setting the COM01:0 = 0 tells the Waveform Generator that no
action on the OC0 Register is to be performed on the next compare match. For compare
output actions in the non-PWM modes refer to Table 53 on page 104. For fast PWM
mode, refer to Table 54 on page 104, and for phase correct PWM refer to Table 55 on
page 105.
96 ATmega128
2467O–AVR–10/06
Share Link: 
