ATmega161(L)
I/O Memory
The I/O space definition of the ATmega161 is shown in the following table:
Table 1. ATmega161 I/O Space
I/O Address (SRAM Address)
$3F($5F)
$3E ($5E)
$3D ($5D)
$3B ($5B)
$3A ($5A)
$39 ($59)
$38 ($58)
$37 ($57)
$36 ($56)
$35 ($55)
$34 ($54)
$33 ($53)
$32 ($52)
$31 ($51)
$30 ($50)
$2F ($4F)
$2E ($4E)
$2D ($4D)
$2C ($4C)
$2B ($4B)
$2A ($4A)
$29 ($49)
$28 ($48)
$27 ($47)
$26 ($46)
$25 ($45)
$24 ($44)
$23 ($43)
$22 ($42)
$21 ($41)
$20 ($40)
$1F ($3F)
$1E ($3E)
$1D ($3D)
Name
SREG
SPH
SPL
GIMSK
GIFR
TIMSK
TIFR
SPMCR
EMCUCR
MCUCR
MCUSR
TCCR0
TCNT0
OCR0
SFIOR
TCCR1A
TCCR1B
TCNT1H
TCNT1L
OCR1AH
OCR1AL
OCR1BH
OCR1BL
TCCR2
ASSR
ICR1H
ICR1L
TCNT2
OCR2
WDTCR
UBRRHI
EEARH
EEARL
EEDR
Function
Status REGister
Stack Pointer High
Stack Pointer Low
General Interrupt MaSK register
General Interrupt Flag Register
Timer/Counter Interrupt MaSK Register
Timer/Counter Interrupt Flag Register
Store Program Memory Control Register
Extended MCU general Control Register
MCU general Control Register
MCU general Status Register
Timer/Counter0 Control Register
Timer/Counter0 (8-bit)
Timer/Counter0 Output Compare Register
Special Function IO Register
Timer/Counter1 Control Register A
Timer/Counter1 Control Register B
Timer/Counter1 High Byte
Timer/Counter1 Low Byte
Timer/Counter1 Output Compare RegisterA High Byte
Timer/Counter1 Output Compare RegisterA Low Byte
Timer/Counter1 Output Compare RegisterB High Byte
Timer/Counter1 Output Compare RegisterB Low Byte
Timer/Counter2 Control Register
Asynchronous mode StatuS Register
Timer/Counter1 Input Capture Register High Byte
Timer/Counter1 Input Capture Register Low Byte
Timer/Counter2 (8-bit)
Timer/Counter2 Output Compare Register
Watchdog Timer Control Register
UART Baud Register HIgh
EEPROM Address Register High
EEPROM Address Register Low
EEPROM Data Register
19