ATMEGA32 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATMEGA32' PDF : 346 Pages View PDF
Power-on Reset
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detec-
tion level is defined in Table 15. The POR is activated whenever VCC is below the
detection level. The POR circuit can be used to trigger the Start-up Reset, as well as to
detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reach-
ing the Power-on Reset threshold voltage invokes the delay counter, which determines
how long the device is kept in RESET after VCC rise. The RESET signal is activated
again, without any delay, when VCC decreases below the detection level.
Figure 16. MCU Start-up, RESET Tied to VCC.
VCC
VPOT
RESET
VRST
TIME-OUT
tTOUT
INTERNAL
RESET
Figure 17. MCU Start-up, RESET Extended Externally
VCC
VPOT
RESET
VRST
TIME-OUT
tTOUT
INTERNAL
RESET
38 ATmega32(L)
2503J–AVR–10/06
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