ATXMEGA192D3-MH View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATXMEGA192D3-MH' PDF : 109 Pages View PDF
Figure 23-1. ADC overview
Channel A MUX selection
XMEGA D3
C o n fig u ra tio n
Reference selection
ADC
Channel A
R e g iste r
1-64 X
Event
Trigger
The ADC may be configured for 8- or 12-bit result, reducing the minimum conversion time (prop-
agation delay) from 0.5 µs for 12-bit to 3.7 µs for 8-bit result.
ADC conversion results are provided left- or right adjusted with optional ‘1’ or ‘0’ padding. This
eases calculation when the result is represented as a signed integer (signed 16-bit number).
PORTA has one ADC. Notation of this peripheral is ADCA.
40
8134I–AVR–12/10
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