AUIR3330S
Example:
If the copper track characteristic between the MOSFET pin and the free wheeling diode (parasitic element Z2) is:
l = 2 cm
So
d = 1mm
R = 0.9m
e = 35µm
L = 8nH
If the MOSFET switches without any slope control, the di/dt can reach 100A/µs. The overvoltage spike created by
the current variation in the parasitic inductance is then
Ul = 8n * (100/1E-6) = 800mv
Now, if the MOSFET slope is controlled and limited to 40A/µs. Then, the overvoltage spike created by the current
variation in the parasitic inductance is:
Ul = 8n * (40/1E-6) = 320mV
Even if the PCB tracks are short, their parasitic impedances are not negligible in 20 kHz application. Limiting the
current variation in these parasitic impedances reduces the overvoltage spikes so the noise level. For further
information about the PCB impedance effect see the application note named “Using the AUIR3330/40: PCB
layout recommendation” on the IR web site (www.irf.com).
Measured impact of the di/dt control:
If the device detects an over current condition, it turns off the output MOSFET without di/dt sequence to reduce
application stress. So a simple test, consists to look at the waveform before (pulse1) and during the over current
protection shutdown (pulse 2) to see the di/dt impact with the same condition (even if the dv/dt stay constant).
Black (Ch1) = In_pwm 5V/div
Red (Ch2) = drain current 10A/div
Green (Ch3) = Vds (drain source voltage)
5V/div
Blue (Ch4) = Vbat (battery voltage) in AC
mode 1V/div
Pulse1
Pulse2
21 www.irf.com © 2012 International Rectifier
May 29, 2014