AX88772 View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
'AX88772' PDF : 43 Pages View PDF
AX88772
USB to 10/100 Fast Ethernet/HomePNA Controller
7.0 Embedded Ethernet Phy Register Description
Address
0h
1h
2h
3h
4h
5h
6h
7h
8h-Fh
Register Name
BMCR
BMSR
PHYIDR1
PHYIDR2
ANAR
ANLPAR
ANER
Reserved
IEEE reserved
Description
Basic mode control register, basic register.
Basic mode status register, basic register.
PHY identifier register 1, extended register.
PHY identifier register 2, extended register.
Auto negotiation advertisement register, extended register.
Auto negotiation link partner ability register, extended register.
Auto negotiation expansion register, extended register.
Reserved and currently not supported.
IEEE 802.3u reserved.
Table 6: Embedded Ethernet Phy Register Map
7.1 Detailed Register Description
The following abbreviations apply to following sections for detailed register description.
Reset value:
1: Bit set to logic one
0: Bit set to logic zero
X: No set value
Pin#: Value latched from pin # at reset time
Access type:
RO: Read only
RW: Read or write
Attribute:
SC: Self-clearing
PS: Value is permanently set
LL: Latch low
LH: Latch high
7.1.1 Basic Mode Control Register (BMCR)
Address 00h
Bit
Bit Name
15 Reset
Default
0, RW / SC
14 Loopback
0, RW
13 Speed selection
1, RW
12 Auto-negotiation
enable
1, RW
11 Power down
0, RW
Description
Reset:
1 = Software reset
0 = Normal operation
Loopback:
1 = Loopback enabled
0 = Normal operation
Speed selection:
1 = 100 Mb/s
0 = 10 Mb/s
Auto-negotiation enable:
1 = Auto-negotiation enabled. Bits 8 and 13 of this register are
ignored when this bit is set.
0 = Auto-negotiation disabled. Bits 8 and 13 of this register
determine the link speed and mode.
Power down:
29
ASIX ELECTRONICS CORPORATION
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