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BGY284 View Datasheet(PDF) - Philips Electronics

Part Name
Description
MFG CO.
'BGY284' PDF : 23 Pages View PDF
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Philips Semiconductors
power amplifier with integrated control loop for
GSM850, EGSM900, DCS1800 & PCS1900
TIMING DIAGRAM
dB
PL LB,HB
+4
+1
-1
-6
(**)
-30
(***)
Preliminary specification
BGY284
(*)
10 µs 8 µs 10 µs
VSTAB
VTXon
Vband
PD LB,HB
(147 bits)
7056/13 (542.8) µs
10 µs 8 µs 10 µs
t
VDAC
Fig.3 Timing diagram
TIMING CHARACTERISTICS
ZS = ZL = 50 ; 3 PD HB,LB 3 dBm; 3.1 VBAT 4.6 V; 2.6 VSTAB 3.0 V; 20 Tmb 85 °C; 1 : 8 ≤ δ ≤ 4 : 8;
unless otherwise specified.
SYMBOL
PARAMETER
td1
delay time; VSTAB high voltage input power before transition VTXon to
logic 1
td2
delay time; Vband to logic 0 or logic 1 before VTXon transition to logic 1
td3
delay time; RF signal on RFin HB,LB before VDAC ramp
td4
delay time; voltage step on VDAC after transition VTXon to logic 1
td5
delay time; transition of VTXon to logic 0 after VDAC signal to off
td6
delay time; VSTAB to 0, after VTXon to logic 0
td7
delay time; change of Vband after VTXon to logic 0
td8
delay time; removal of RF signal on RFin HB,LB after VDAC signal to off
MIN. TYP. MAX. UNIT
0
µs
0
µs
0
µs
10
µs
0
µs
10
µs
0
µs
0
µs
2003 Aug 20
6
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