C8051F060/1/2/3/4/5/6/7
Figure 6.8. DMA0BND: DMA0 Instruction Boundary Register
SFR Page: 3
SFR Address: 0xFD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bits 7-6: Unused.
Bits 5-0: DMA0 instruction address to begin with when executing DMA instructions.
Reset Value
00000000
Figure 6.9. DMA0ISW: DMA0 Instruction Status Register
SFR Page: 3
SFR Address: 0xFE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bits 7-6: Unused.
Bits 5-0: Contains the address of the current DMA0 Instruction to be executed.
Reset Value
00000000
Rev. 1.2
83