C8051F064 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F064' PDF : 328 Pages View PDF
C8051F060/1/2/3/4/5/6/7
Figure 5.20. Offset and Gain Register Mapping
The offset register value affects the offset at the analog input as follows:
Offset Register (14 Bits)
0x3FFF
0x2000
0x0000
Approximate Offset Change (V)
-3.125% * VREF
0
+3.125% * VREF
Offset Change ≅ 0---x---2----0---0--0-----–----O-----f--f--s--e---t---R----e---g---i-s---t-e---r × 3.125% × VREF
8192
The gain register value affects the slope of the ADC transfer function as follows:
Gain Register (13 Bits)
0x1FFF
0x1000
0x0000
Approximate Slope Change
+3.125%
0
-3.125%
Slope Change ≅ G-----a---i-n-----R----e--g---i--s--t--e---r---–-----0---x---1---0---0---0- × 3.125%
4096
Figure 5.21. Offset and Gain Calibration Block Diagram
VREF
AINn
AINnG
Offset
-
+
+ Gain
16
ADCn
ADCn Data
Rev. 1.2
67
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