C8051F312 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F312' PDF : 224 Pages View PDF
C8051F310/1/2/3/4/5/6/7
SFR Definition 13.17. P3MDOUT: Port3 Output Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
-
-
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0xA7
Bits7–5:
Bits4–0:
UNUSED. Read = 000b; Write - don’t care.
Output Configuration Bits for P3.4–P3.0 (respectively): ignored if corresponding bit in regis-
ter P3MDIN is logic 0.
0: Corresponding P3.n Output is open-drain.
1: Corresponding P3.n Output is push-pull.
Note:
Only P3.0–P3.4 are associated with Port pins on C8051F310/2/4 devices; Only P3.0 is associated with a
Port pin on C8051F311/3/5/6/7 devices.
Table 13.1. Port I/O DC Electrical Characteristics
VDD = 2.7 to 3.6 V, –40 to +85 °C unless otherwise specified
Parameters
Conditions
Min
Typ
Max
IOH = –3 mA, Port I/O push-pull VDD – 0.7
—
—
Output High Voltage
IOH = –10 µA, Port I/O push-pull VDD – 0.1
—
—
IOH = –10 mA, Port I/O push-pull
—
VDD – 0.8 —
IOL = 8.5 mA
—
—
0.6
Output Low Voltage
IOL = 10 µA
—
—
0.1
Input High Voltage
Input Low Voltage
Input Leakage Current
IOL = 25 mA
Weak Pullup Off
Weak Pullup On, VIN = 0 V
—
1.0
—
2.0
—
—
—
—
0.8
—
—
±1
—
25
40
Units
V
V
V
V
µA
Rev. 1.6
139
Share Link: 
