C8051F344 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F344' PDF : 276 Pages View PDF
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Table 9.4. Interrupt Summary
Interrupt Source
Interrupt
Vector
Priority
Order
Pending Flag
Enable
Flag
Priority
Control
Reset
External Interrupt 0
(INT0)
Timer 0 Overflow
External Interrupt 1
(INT1)
Timer 1 Overflow
UART0
Timer 2 Overflow
0x0000
0x0003
0x000B
0x0013
0x001B
0x0023
0x002B
SPI0
0x0033
SMB0
0x003B
USB0
ADC0 Window
Compare
ADC0 Conversion
Complete
Programmable Counter
Array
Comparator0
0x0043
0x004B
0x0053
0x005B
0x0063
Comparator1
0x006B
Timer 3 Overflow
0x0073
VBUS Level
0x007B
UART1
0x0083
Top None
N/A
N/A
Always
Enabled
Always
Highest
0 IE0 (TCON.1)
Y Y EX0 (IE.0) PX0 (IP.0)
1 TF0 (TCON.5)
Y Y ET0 (IE.1) PT0 (IP.1)
2 IE1 (TCON.3)
Y Y EX1 (IE.2) PX1 (IP.2)
3 TF1 (TCON.7)
Y Y ET1 (IE.3) PT1 (IP.3)
4
RI0 (SCON0.0)
TI0 (SCON0.1)
Y N ES0 (IE.4) PS0 (IP.4)
5
TF2H (TMR2CN.7)
TF2L (TMR2CN.6)
Y N ET2 (IE.5) PT2 (IP.5)
SPIF (SPI0CN.7)
6
WCOL (SPI0CN.6)
MODF (SPI0CN.5)
Y
N
ESPI0
(IE.6)
PSPI0
(IP.6)
RXOVRN (SPI0CN.4)
7 SI (SMB0CN.0)
Y
N
ESMB0
(EIE1.0)
PSMB0
(EIP1.0)
8 Special
N
N
EUSB0
(EIE1.1)
PUSB0
(EIP1.1)
9
AD0WINT
(ADC0CN.3)
Y
N
EWADC0
(EIE1.2)
PWADC0
(EIP1.2)
10
AD0INT (ADC0CN.5) Y
N
EADC0
(EIE1.3)
PADC0
(EIP1.3)
11
CF (PCA0CN.7)
CCFn (PCA0CN.n)
Y
N
EPCA0
(EIE1.4)
PPCA0
(EIP1.4)
12
CP0FIF (CPT0CN.4)
CP0RIF (CPT0CN.5)
N
N
ECP0
(EIE1.5)
PCP0
(EIP1.5)
13
CP1FIF (CPT1CN.4)
CP1RIF (CPT1CN.5)
N
N
ECP1
(EIE1.6)
PCP1
(EIP1.6)
14
TF3H (TMR3CN.7)
TF3L (TMR3CN.6)
N
N
ET3
(EIE1.7)
PT3
(EIP1.7)
15 N/A
N/A
N/A
EVBUS
(EIE2.0)
PVBUS
(EIP2.0)
16
RI1 (SCON1.0)
TI1 (SCON1.1)
N
N
ES1
(EIE2.1)
PS1
(EIP2.1)
9.3.5. Interrupt Register Descriptions
The SFRs used to enable the interrupt sources and set their priority level are described below. Refer to the
datasheet section associated with a particular on-chip peripheral for information regarding valid interrupt
conditions for the peripheral and the behavior of its interrupt-pending flag(s).
90
Rev. 1.3
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