C8051F360/1/2/3/4/5/6/7/8/9
SFR Definition 6.3. IDA0L: IDA0 Data Word LSB
SFR Page: all pages
SFR Address: 0x96
R/W
R/W
R
R
R
R
R
R
Reset Value
—
—
—
—
—
— 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bits 7–6: IDA0 Data Word Low-Order Bits.
Lower 2 bits of the 10-bit Data Word.
Bits 5–0: UNUSED. Read = 000000b, Write = don’t care.
Table 6.1. IDAC Electrical Characteristics
–40 to +85 °C, VDD = 3.0 V Full-scale output current set to 2 mA unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Static Performance
Resolution
10
Units
bits
Integral Nonlinearity
—
±0.5
±2
LSB
Differential Nonlinearity Guaranteed Monotonic
—
±0.5
±1
LSB
Output Compliance Range
Offset Error
—
— VDD – 1.2 V
—
0
—
LSB
Full Scale Error
2 mA Full Scale Output Current
–15
0
15
LSB
Full Scale Error Tempco
—
30
VDD Power Supply
Rejection Ratio
—
6.5
Dynamic Performance
Output Settling Time to 1/2
LSB
IDA0H:L = 0x3FF to 0x000
—
5
Startup Time
—
5
—
ppm/°C
—
µA/V
—
µs
—
µs
Gain Variation
1 mA Full Scale Output Current
—
±1
—
%
0.5 mA Full Scale Output Current
—
±1
—
%
Power Consumption
Power Supply Current (VDD
2 mA Full Scale Output Current
1 mA Full Scale Output Current
—
2140
—
—
1140
—
µA
µA
supplied to IDAC)
0.5 mA Full Scale Output Current
—
640
—
µA
66
Rev. 1.0