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C8051F380 View Datasheet(PDF) - Silicon Laboratories

Part Name
Description
MFG CO.
C8051F380
Silabs
Silicon Laboratories Silabs
'C8051F380' PDF : 321 Pages View PDF
C8051F380/1/2/3/4/5/6/7/C
SFR Definition 19.1. CLKSEL: Clock Select
Bit
7
6
5
4
3
2
1
0
Name
USBCLK[2:0]
OUTCLK
CLKSL[2:0]
Type
R
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xA9; SFR Page = All Pages
Bit Name
Function
7
Unused Read = 0b; Write = don’t care
6:4 USBCLK[2:0] USB Clock Source Select Bits.
000: USBCLK derived from the Internal High-Frequency Oscillator.
001: USBCLK derived from the Internal High-Frequency Oscillator / 8.
010: USBCLK derived from the External Oscillator.
011: USBCLK derived from the External Oscillator/2.
100: USBCLK derived from the External Oscillator/3.
101: USBCLK derived from the External Oscillator/4.
110: USBCLK derived from the Internal Low-Frequency Oscillator.
111: Reserved.
3 OUTCLK Crossbar Clock Out Select.
If the SYSCLK signal is enabled on the Crossbar, this bit selects between outputting
SYSCLK and SYSCLK synchronized with the Port I/O pins.
0: Enabling the Crossbar SYSCLK signal outputs SYSCLK.
1: Enabling the Crossbar SYSCLK signal outputs SYSCLK synchronized with the
Port I/O.
2:0 CLKSL[2:0] System Clock Source Select Bits.
000: SYSCLK derived from the Internal High-Frequency Oscillator / 4 and scaled
per the IFCN bits in register OSCICN.
001: SYSCLK derived from the External Oscillator circuit.
010: SYSCLK derived from the Internal High-Frequency Oscillator / 2.
011: SYSCLK derived from the Internal High-Frequency Oscillator.
100: SYSCLK derived from the Internal Low-Frequency Oscillator and scaled per
the OSCLD bits in register OSCLCN.
101-111: Reserved.
144
Rev. 1.4
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