C8051F97X View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F97X' PDF : 455 Pages View PDF
17.7. Voltage Reference
The voltage reference MUX is configurable to use an externally connected voltage reference, the internal voltage
reference, or one of two power supply voltages (see Figure 17.7).
The voltage reference MUX is configured using the REF0CN register. Electrical specifications are can be found in
the Electrical Specifications Chapter.
Important Note about the VREF Input: Port pin P0.0 is used as the external VREF input. When using an external
voltage reference, P0.0/VREF should be configured as an analog input and skipped by the Priority Crossbar
Decoder. Refer to “26. Port I/O (Port 0, Port 1, Port 2, Port 3, Port 4, Port 5, Port 6, Crossbar, and Port Match)” on
page 277 for complete Port I/O configuration details. The external reference voltage must be within the range 0 <
VREF < VDD.
REF0CN
VDD
R1
External
Voltage
Reference
Circuit
P0.0/VREF
VDD
GND
4.7F +
0.1F
Recommended
Bypass Capacitors
EN Temp Sensor
To AMUX0
00
01
Internal 1.8V
10
Regulated Digital Supply
11
Internal 1.65V
High Speed Reference
VREF
(to ADC)
Figure 17.7. Voltage Reference Functional Block Diagram
17.7.1. External Voltage Reference
To use an external voltage reference, REFSL[1:0] should be set to 00. Bypass capacitors should be added as
recommended by the manufacturer of the external voltage reference. If the manufacturer does not provide
recommendations, a 4.7 µF in parallel with a 0.1 µF capacitor is recommended.
Rev 1.1
112
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