C8051T602-GS View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051T602-GS' PDF : 168 Pages View PDF
C8051T600/1/2/3/4/5/6
3. Pin Definitions
Table 3.1. Pin Definitions for the C8051T600/1/2/3/4/5
Name QFN11 SOIC14 Type Description
Pin Pin
VDD
3
GND
11
RST /
8
7
Power Supply Voltage.
3
Ground.
14
D I/O Device Reset. Open-drain output of internal POR or VDD monitor.
C2CK
P0.7 /
10
C2D
P0.0 /
1
VREF
P0.1
2
P0.2 /
4
VPP
P0.3 /
5
EXTCLK
P0.4
6
P0.5
7
P0.6 /
9
CNVSTR
NC
—
D I/O Clock signal for the C2 Debug Interface.
2 D I/O or Port 0.7.
A In
D I/O Bi-directional data signal for the C2 Debug Interface.
5 D I/O or Port 0.0.
A In
A In External VREF input.
6 D I/O or Port 0.1.
A In
8 D I/O or Port 0.2.
A In
A In VPP Programming Supply Voltage.
10 D I/O or Port 0.3.
A In
A I/O or External Clock Pin. This pin can be used as the external clock
D In input for CMOS, capacitor, or RC oscillator configurations.
12 D I/O or Port 0.4.
A In
13 D I/O or Port 0.5.
A In
1 D I/O or Port 0.6.
A In
4,9,11
D In ADC0 External Convert Start Input.
No Connection.
Rev. 1.2
17
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