C8051T602-GS View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051T602-GS' PDF : 168 Pages View PDF
C8051T600/1/2/3/4/5/6
9.3.3. Settling Time Requirements
A minimum tracking time is required before each conversion to ensure that an accurate conversion is per-
formed. This tracking time is determined by any series impedance, including the AMUX0 resistance, the
the ADC0 sampling capacitance, and the accuracy required for the conversion. Note that in delayed track-
ing mode, three SAR clocks are used for tracking at the start of every conversion. For many applications,
these three SAR clocks will meet the minimum tracking time requirements.
Figure 9.3 shows the equivalent ADC0 input circuit. The required ADC0 settling time for a given settling
accuracy (SA) may be approximated by Equation 9.1. See Table 8.10 for ADC0 minimum settling time
requirements as well as the mux impedance and sampling capacitor values.
t
=
ln
S-2---An--
RTOTALCSAMPLE
Equation 9.1. ADC0 Settling Time Requirements
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
RTOTAL is the sum of the AMUX0 resistance and any external source resistance.
n is the ADC resolution in bits (10).
MUX Select
Input Pin
RMUX
RCInput= RMUX * CSAMPLE
CSAMPLE
Note: See electrical specification tables for RMUX and CSAMPLE parameters.
Figure 9.3. ADC0 Equivalent Input Circuits
Rev. 1.2
43
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