C8051T603 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051T603' PDF : 168 Pages View PDF
C8051T600/1/2/3/4/5/6
Table 3.2. Pin Definitions for the C8051T606
Name QFN11 MSOP10 QFN10 Type Description
Pin
Pin
Pin
VDD
3
3
2
GND
9
9
8
Power Supply Voltage.
Ground (Required).
GND*
11
—
—
Ground (Optional).
RST /
8
8
7
D I/O Device Reset. Open-drain output of internal POR or
VDD monitor.
C2CK
P0.7 /
10
10
D I/O Clock signal for the C2 Debug Interface.
9 D I/O or Port 0.7.
A In
C2D
D I/O Bi-directional data signal for the C2 Debug Interface.
P0.1
2
2
1 D I/O or Port 0.1.
A In
P0.2 /
4
4
3 D I/O or Port 0.2.
A In
VPP
A In VPP Programming Supply Voltage.
P0.3 /
5
5
4 D I/O or Port 0.3.
A In
EXTCLK
P0.4
6
P0.5
7
NC
1
A I/O or External Clock Pin. This pin can be used as the exter-
D In nal clock input for CMOS, capacitor, or RC oscillator
configurations.
6
5 D I/O or Port 0.4.
A In
7
6 D I/O or Port 0.5.
A In
1
10
No Connection.
18
Rev. 1.2
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