C8051T605-GS View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051T605-GS' PDF : 168 Pages View PDF
C8051T600/1/2/3/4/5/6
21.2. Programmable Internal High-Frequency (H-F) Oscillator
All C8051T600/1/2/3/4/5/6 devices include a programmable internal high-frequency oscillator that defaults
as the system clock after a system reset. The internal oscillator period can be adjusted via the OSCICL
register as defined by SFR Definition 21.1.
On C8051T600/1/2/3/4/5/6 devices, OSCICL is factory calibrated to obtain a 24.5 MHz base frequency.
The system clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8, as
defined by the IFCN bits in register OSCICN. The divide value defaults to 8 following a reset.
SFR Definition 21.1. OSCICL: Internal H-F Oscillator Calibration
Bit
7
Name
Type
R
Reset
0
6
Varies
5
Varies
4
3
2
OSCICL[6:0]
R/W
Varies
Varies
Varies
1
Varies
0
Varies
SFR Address = 0xB3
Bit Name
Function
7 Unused Unused. Read = 0; Write = Don’t Care
6:0 OSCICL[6:0] Internal Oscillator Calibration Bits.
These bits determine the internal oscillator period. When set to 0000000b, the H-F
oscillator operates at its fastest setting. When set to 1111111b, the H-F oscillator
operates at its slowest setting. The reset value is factory calibrated to generate an
internal oscillator frequency of 24.5 MHz.
Rev. 1.2
101
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