CC1111F32RSPR View Datasheet(PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

Part Name

Description

MFG CO.

CC1111F32RSPR

Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller

TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

'CC1111F32RSPR' PDF : 240 Pages View PDF

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CC1110Fx / CC1111Fx
PICTL (0x8C) – Port Interrupt Control
Bit Name
Reset R/W Description
7
0
R0
Not used
6
PADSC
0
R/W Drive strength control for I/O pins in output mode. Selects output drive
capability to account for low I/O supply voltage VDD on pin DVDD.
0 Minimum drive capability. VDD equal or greater than 2.6V
1 Maximum drive capability. VDD less than 2.6V
5
P2IEN
0
R/W Port 2, inputs 4 to 0 interrupt enable.
0 Interrupts are disabled
1 Interrupts are enabled
4
P0IENH
0
R/W Port 0, inputs 7 to 4 interrupt enable.
0 Interrupts are disabled
1 Interrupts are enabled
3
P0IENL
0
R/W Port 0, inputs 3 to 0 interrupt enable.
0 Interrupts are disabled
1 Interrupts are enabled
2
P2ICON
0
R/W Port 2, inputs 4 to 0 interrupt configuration. This bit selects the interrupt
request condition for all port 2 inputs
0 Rising edge on input gives interrupt
1 Falling edge on input gives interrupt
1
P1ICON
0
R/W Port 1, inputs 7 to 0 interrupt configuration. This bit selects the interrupt
request condition for all port 1 inputs
0 Rising edge on input gives interrupt
1 Falling edge on input gives interrupt
0
P0ICON
0
R/W Port 0, inputs 7 to 0 interrupt configuration. This bit selects the interrupt
request condition for all port 0 inputs. For CC1111Fx , this bit must be set to 0
when USB is used, since the internal USB resume interrupt mapped to P0[7]
uses rising edge.
0 Rising edge on input gives interrupt
1 Falling edge on input gives interrupt
P1IEN (0x8D) – Port 1 Interrupt Mask
Bit Name
Reset R/W Description
7:0 P1_[7:0]IEN
0x00 R/W Port P1_7 to P1_0 interrupt enable
0 Interrupts are disabled
1 Interrupts are enabled
SWRS033E
Page 101 of 239

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