CC2430ZF128RTC View Datasheet(PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
Part Name
Description
MFG CO.
CC2430ZF128RTC
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
'CC2430ZF128RTC' PDF : 212 Pages View PDF
CC2430
Peripherals : I/O ports
Table 40: Peripheral I/O Pin Mapping
Periphery /
Function
P0
P1
7 6 5 4 3 2 1 0 76543
P2
2 1043 21 0
ADC
A7 A6 A5 A4 A3 A2 A1 A0
T
USART0 SPI
Alt. 2
C SS M0 MI
M0 MI C SS
USART0 UART
Alt. 2
RT CT TX RX
TX RX RT CT
USART1 SPI
Alt. 2
MI M0 C SS
MI M0 C SS
USART1 UART
Alt. 2
RX TX RT CT
RX TX RT CT
TIMER1
Alt. 2
2
1
0
0 12
TIMER3
Alt. 2
10
1
0
TIMER4
Alt. 2
10
1
0
32.768 kHz
XOSC
Q2 Q1
DEBUG
DD
CD
13.4.6.1
Timer 1
PERCFG.T1CFG selects whether to use
alternative 1 or alternative 2 locations.
In Table 40, the Timer 1 signals are shown as
the following:
• 0 : Channel 0 capture/compare pin
• 1 : Channel 1 capture/compare pin
• 2 : Channel 2 capture/compare pin
P2DIR.PRIP0 selects the order of
precedence when assigning several
13.4.6.2
Timer 3
PERCFG.T3CFG selects whether to use
alternative 1 or alternative 2 locations.
In Table 40, the Timer 3 signals are shown as
the following:
peripherals to port 0. When set to 10 or 11 the
timer 1 channels have precedence.
P2SEL.PRI1P1 and P2SEL.PRI0P1 select
the order of precedence when assigning
several peripherals to port 1. The timer 1
channels have precedence when the former is
set low and the latter is set high.
• 0 : Channel 0 compare pin
• 1 : Channel 1 compare pin
P2SEL.PRI2P1 selects the order of
precedence when assigning several
peripherals to port 1. The timer 3 channels
have precedence when the bit is set.
13.4.6.3
Timer 4
PERCFG.T4CFG selects whether to use
alternative 1 or alternative 2 locations.
In Table 40, the Timer 4 signals are shown as
the following:
• 0 : Channel 0 compare pin
• 1 : Channel 1 compare pin
P2SEL.PRI1P1 selects the order of
precedence when assigning several
peripherals to port 1. The timer 4 channels
have precedence when the bit is set.
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 80 of 211
Share Link: 