CHA2066-QAG20 View Datasheet(PDF) - United Monolithic Semiconductors
Part Name
Description
MFG CO.
'CHA2066-QAG20' PDF : 12 Pages View PDF
10-16GHz Low Noise Amplifier
Definition of the Sij reference plans
CHA2066-QAG
The reference plans are defined from the
footprint
of
the
recommended
characterization board shown below under
the number 95542.
The reference is the symmetrical axis of the
package. The input is and output reference
plans are located at 2.65mm offset (input
wise and output wise respec.) from this axis.
Then, the given Sij incorporates this land
patern.
2.65
2.65
Circuit Biasing options
This circuit is self-biased, and flexibility is provided by the access to number of pads. the
internal DC electrical schematic is given in order to use these pads in a safe way.
- The two requirements are:
N°1: Not exceed Vds = 3.5Volt (internal Drain to S ource voltage).
N°2: Not biased in such a way that Vgs becomes posi tive. (Internal Gate to Source voltage)
- We propose two standard biasing:
Low Noise and low consumption BD:
Low Noise and high output power BE:
Vd = 4V, B and D grounded, and E not connected
Idd = 50mA & Pout-1dB = +10dBm Typica
Vd = 4V, B and E grounded
Idd = 70mA & Pout-1dB = +14dBm Typical
Ref. : DSCHA2066QAG6332 - 28 Nov 06
9/12
Specifications subject to change without notice
Route Départementale 128, BP46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0) 1 69 33 03 08 - Fax: +33 (0) 1 69 33 03 09
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