CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
Table 3-2. I/O Window Options
I/O Window Option Description
Enable
Start Address
End Address
Offset Address
Auto Size
Data Size
Timing
Each of the seven windows can be programmed as an I/O window and individually enabled.
The start address of the window is programmable on single-byte boundaries from 0 to 64 Kbytes.
The end address of the window is also programmable on single-byte boundaries from 0 to 64 Kbytes.
The offset address is added to the PCI address to determine the address for accessing the PC Card.
The size of accesses can be set automatically, based on the PC Card -IOIS16 signal.
The size of accesses can be set manually to either 8 or 16 bits, overriding the auto size option.
The timing of accesses (setup/command/recovery) can be set by either of two timing register sets:
Timer Set 0 or Timer Set 1.
CAUTION: The windows of the CL-PD6833 should never be allowed to overlap with each other or the other devices
in the system. This would cause signal collisions and result in erratic behavior.
PCI Memory Address Space
4 Gbytes
Memory
Page 255
PC Card Memory Address Space
64 Mbytes
Common Memory
Attribute
Memory
Card Memory Window
System Memory Map
End Address Registers
System Memory Map
Start Address Registers
System Memory Map
Upper Address Register
(selects 16-Mbyte page)
.
.
.
.
Memory Window
.
.
.
.
16-Mbyte
Page
Card Memory Map
Offset Address Registers
Page 1
Page 0
NOTE: PCI memory window can map to either
common or attribute PC Card memory.
Figure 3-1. Memory-to-Memory Window Organization
June 1998
ADVANCE DATA BOOK v0.3
27
INTRODUCTION TO THE CL-PD6833
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