CL-PS6700 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PS6700' PDF : 48 Pages View PDF
CL-PS6700
Low-Power PC Card Controller
4.2 Interrupt Structure
Interrupt sources in the CL-PS6700 include card inputs, GPIO pins (PCTL/PDREQ_L), and internal status
signals. All interrupts in the CL-PS6700 are edge triggered. There are five register bits that control each
interrupt, as shwon in Table 4-1.
The Interrupt Status register indicates which interrupt inputs have transitioned (rising edge or falling edge)
since they were last cleared (using the Interrupt Clear register). The OR’ing of bits in the Interrupt Status
register (bits not masked by the Mask register) generates an interrupt on either the PIRQ[0]_L or
PIRQ[1]_L output as selected in the Interrupt Output Select register. A bit set to ‘1’ in the Interrupt Output
Select register routes the corresponding interrupt to PIRQ[1]. The Interrupt Input Level register reflects
the current state of the raw interrupt sources (signals directly from the PC Card socket, GPIO pins, and
internal status signals).
Table 4-1. Interrupt Register Seta
Interrupt Sources
Bit Position 15 14 13 12 11 10 9 8 6 5 4 3 2 1 0
Register Name
R/W
Interrupt Status
Interrupt Mask
Interrupt Clear
Interrupt Output Select
Interrupt Input Level
a x means available.
– means unavailable.
R –xxxxxxxxxxxxxx
R/W – x x x x x x x x x x x x x x
W –xxxxxxxxxxxxxx
R/W – x x x x x x x x x x x x x x
R –xxxxxxxxxxxxxx
November 1997
CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED
PRELIMINARY DATA BOOK v1.0
23
REGISTERS
Share Link: 
