CL-PS6700-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PS6700-VC-A' PDF : 48 Pages View PDF
CL-PS6700
Low-Power PC Card Controller
4.4.2 DMA Control Register (0X0C004000)
Bit(s)
15:9
8
7
6:4
3
2
1
0
Description
Default R/W
Reserved
–
–
Enable Handshake with CL-PS7111 Using PDREQ_L. If this bit is cleared, then PDREQ_L
0
R/W
is always deasserted. If Power Management register bit 7 is set, then this bit is a don’t care.
Card DMA Enable. Enables card DMA transfer. A DMA transfer is defined by REG_L deas-
0
R/W
serted and IORD_L or IOWR_L asserted. OE_L and WE_L indicate the terminal count for read
and write, respectively.
DMA Request Input Select. Selects input to be used for DMA handshake between the 000 R/W
CL-PS6700 and the card. Currently, there is no dedicated card pin assigned for DMA request.
000 – Disable DMA access
001 – PCTL[2]
010 – PCM_VS[2]
011 – Reserved
101 – PCM_WP input
110 – PCM_BVD2
111 – Card always requesting DMA transfer (no handshake between CL-PS6700 and card).
After each DMA transfer from CL-PS7111 to CL-PS6700, PDREQ_L is immediately
reasserted.
DMA Request Polarity Select. If this bit is set, the selected DMA request input (as described
0
R/W
above) is inverted to be active-low.
Transparent DMA Request. If this bit is set, then external DMA request input is passed
0
R/W
through to the PDREQ_L output after being synchronized to PCLK.
CPU Initiated DMA. This allows the CPU to generate a card DMA transfer. If this bit is set, a
0
R/W
CPU access to I/O space is converted to a DMA transfer. REG_L is kept high (deasserted),
and IORD_L or IOWR_L is used to transfer data.
CPU Initiated DMA with Terminal Count. If this bit is set, a CPU access to I/O space is con-
0
R/W
verted to a DMA transfer. REG_L is kept high (deasserted). The end of DMA is indicated to the
card by OE_L low (read) or WE_L low (write). IORD_L or IOWR_L are used to transfer data.
4.4.3 Device Information Register (0X0C004400)
Bit(s)
7:6
5
4:2
1:0
Description
Chip ID
Dual/Single Socket. Single-socket device if low.
Revision Level. This changes as new revisions become available.
Reserved
Default R/W
01
R
0
R
00
R
00
R
November 1997
CIRRUS LOGIC CONFIDENTIAL, NDA REQUIRED
PRELIMINARY DATA BOOK v1.0
27
REGISTERS
Share Link: 
