CL-PS7111-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PS7111-VC-A' PDF : 105 Pages View PDF
CL-PS7111
Low-Power System-on-a-Chip
clock match), a Port A event (corresponding to a keypress) or a wake-up asserted forces the CL-PS7111
out of standby mode. Figure 3-7 and Figure 3-8 show the CLKEN timing when CLKENSL is low.
CLKEN timing while entering STDBY mode
13 MHz IN
CLKEN
Figure 3-7. CLKEN Timing Entering Standby Mode
EXPCLK-IN
(INT) RUN
CLKEN
CLKEN timing - coming out of STDBY
t41
INTR./
WAKEUP
Figure 3-8. CLKEN Timing Leaving Standby Mode
36
FUNCTIONAL DESCRIPTION
September 1997
PRELIMINARY DATA BOOK v2.0
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