CLC2008ISO8X View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'CLC2008ISO8X' PDF : 16 Pages View PDF
Data Sheet
approximately <1dB peaking in the frequency response.
The Frequency Response vs. CL plot, on page 4, illustrates
the response of the CLCx008.
CL (pF)
10pF
20pF
50pF
100pF
RS (Ω)
0
100
100
100
-3dB BW (kHz)
22
19
12
10.2
Table 1: Recommended RS vs. CL
For a given load capacitance, adjust RS to optimize the
tradeoff between settling time and bandwidth. In general,
reducing RS will increase bandwidth at the expense of
additional overshoot and ringing.
high frequency performance. CADEKA has evaluation
boards to use as a guide for high frequency layout and as
an aid in device testing and characterization. Follow the
steps below as a basis for high frequency layout:
▪▪Include 6.8µF and 0.1µF ceramic capacitors for power
supply decoupling
▪▪Place the 6.8µF capacitor within 0.75 inches of the power pin
▪▪Place the 0.1µF capacitor within 0.1 inches of the power pin
▪▪Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
▪▪Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts below for more
information.
Overdrive Recovery
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for
the amplifier to return to its normal or linear operating
point. The recovery time varies, based on whether the
input or output is overdriven and by how much the range is
exceeded. The CLC1008 and CLC2008 will typically recover
in less than 20ns from an overdrive condition. Figure 8
shows the CLC1008 in an overdriven condition.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
Evaluation Board #
Products
CEB002
CLC1008 in SOT23
CEB003
CLC1008 in SOIC
CEB006
CLC2008 in SOIC
CEB010
CLC2008 in MSOP
Evaluation Board Schematics
G=5
Output
Input
Evaluation board schematics and layouts are shown in
Figures 8-14. These evaluation boards are built for dual-
supply operation. Follow these steps to use the board in a
single-supply application:
1. Short -Vs to ground.
2. Use C3 and C4, if the -VS pin of the amplifier is not
directly connected to the ground plane.
Time (200ns/div)
Figure 8. Overdrive Recovery
Layout Considerations
General layout and supply bypassing play major roles in
©2009-2013 Exar Corporation
12/16
Rev 2C
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