CMX615D4 View Datasheet(PDF) - MX-COM Inc
Part Name
Description
MFG CO.
'CMX615D4' PDF : 26 Pages View PDF
Digital Line to POTS Interface
CMX615
1.7.1.3 Operating Characteristics
For the following conditions unless otherwise specified:
VDD = 2.7V at Tamb = 25°C and VDD = 3.0V to 5.5V at Tamb = -40 to +85°C,
Xtal Frequency = 3.579545MHz ± 0.1%
0dBm corresponds to 775mVrms.
DC Parameters
Notes Min.
Typ.
IDD Zero-Power Mode
OpAmp only Enabled, VDD = 5.0V
OpAmp only Enabled, VDD = 3.3V
All Enabled, VDD = 5.0V
All Enabled, VDD = 3.3V
Logic ‘1’ Input Level
Logic ‘0’ Input Level
Logic Input Leakage Current (Vin = 0 to VDD),
(excluding XTAL/CLOCK input)
Output Logic ‘1’ Level (IOH = 360µA)
Output Logic ‘0’ Level (IOL = 360µA)
IRQN O/P ‘Off State Current (VOUT = VDD)
1, 2
-
1
-
1
-
1
-
1
-
3
70%
3
-
3
-1.0
VDD-0.4
-
-
<1.0
1.5
0.75
5.0
3.0
-
-
-
-
-
-
FSK Encoder and Tx UART
Level at TONEFSK pin
Twist (Mark level WRT Space level)
Tx 1200bits/sec (V23 mode)
Baud Rate (set by UART and Xtal frequency)
Mark (Logical 1) Frequency
Space (Logical 0) Frequency
Tx 1200bits/sec (Bell 202 mode)
Baud Rate (set by UART and Xtal frequency)
Mark (Logical 1) Frequency
Space (Logical 0) Frequency
Notes
4
Min.
-1.0
-2.0
1194
1297
2097
1194
1197
2197
Typ.
0.0
0
1200
1300
2100
1200
1200
2200
Max.
-
-
-
7.5
4.5
-
30%
+1.0
-
0.4
1.0
Max.
1.0
+2.0
1206
1303
2103
1206
1203
2203
Unit
µA
mA
mA
mA
mA
VDD
VDD
µA
V
V
µA
Unit
dBm
dB
Baud
Hz
Hz
Baud
Hz
Hz
TONEFSK Signal Level
Notes Min. Typ.
Max.
Unit
Level at TONEFSK pin for:
Single tone
Dual tone (per tone)
DTMF High Frequency Group
DTMF Low Frequency Group
Output Impedance
Tone frequency resolution
Tone output distortion
4
-1.0
0
1.0
dBm
4
-4.0 -3.0
-2.0
dBm
4
-4.0 -3.0
-2.0
dBm
4
-6.0 -5.0
-4.0
dBm
-
10.0
-
kΩ
-2.0
-
2.0
Hz
5
-
0.8
-
%
Notes:
1. At 25°C, not including any current drawn from the CMX615 pins by external circuitry other
than X1, C1 and C2.
2. All logic inputs at VSS except for CSN input which is at VDD.
3. Excluding XTAL/CLOCK pin.
4. At VDD = 5.0V, load resistance greater than 40kΩ, signal levels are proportional to VDD.
5. Frequency above 300Hz.
6. SPM has a soft rise and fall time of about 4.5ms. The level changes between VBIAS and 0dBm
in 2dB steps, 16 steps per rise and fall. When SPM is disabled, an extra 4.5ms falling tail end
of signal should be taken into consideration.
© 1999 Consumer Microcircuits Limited
22
D/615/4
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