CMX624P4 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX624P4' PDF : 26 Pages View PDF
V23 / Bell 202 Modem
CMX624
1.7.1.3 Operating Characteristics
For the following conditions unless otherwise specified:
VDD = 2.7V at Tamb = 25°C and VDD = 3.0V to 5.5V at Tamb = -40 to +85°C,
Xtal Frequency = 3.579545MHz ± 0.1%, 0dBm corresponds to 775mVrms.
DC Parameters
IDD (Zero Power mode)
(Running, TXON o/p Off, VDD= 5.0V)
(Running, TXON o/p Off, VDD= 3.3V)
(Running, TXON o/p On, VDD= 5.0V)
(Running, TXON o/p On, VDD= 3.3V)
Logic '1' Input Level
Logic '0' Input Level
Logic Input Leakage Current (Vin = 0 to VDD),
(excluding XTAL/CLOCK input)
Output Logic '1' Level (lOH = 360µA)
Output Logic '0' Level (lOL = 360µA)
IRQN O/P 'Off' State Current (Vout = VDD)
Schmitt trigger input high-going threshold (Vthi)
(see Figure 11)
Schmitt trigger input low-going threshold (Vtlo)
(see Figure 11)
RLYDRV ‘ON’ resistance to VSS (VDD= 5.0V)
Notes
1, 2
1
1
1
1
3
3
Min.
-
-
-
-
-
70%
-
-1.0
VDD-0.4
-
-
0.56VDD
0.44VDD
- 0.6V
-
Typ.
1.0
3.4
1.8
3.5
1.9
-
-
-
-
-
-
-
-
38.0
Max. Unit
-
µA
6.0
mA
3.2
mA
6.2
mA
3.4
mA
-
VDD
30%
VDD
+1.0
µA
-
V
0.4
V
1.0
µA
0.56VDD V
+ 0.6V
0.44VDD V
TBD
Ω
Notes:
1. At 25°C, not including any current drawn from the CMX624 pins by external circuitry other
than X1, C1 and C2.
2. All logic inputs at VSS except for RT and CSN inputs which are at VDD.
3. Excluding RD, RT and XTAL/CLOCK pins.
FSK Modulator and Tx UART
Level at TOP pin.
Twist (Mark level WRT Space level)
Tx 1200bits/sec (V.23 mode)
Baud Rate (set by UART and Xtal frequency)
Mark (Logical 1) Frequency
Space (Logical 0) Frequency
Tx 75bits/sec (V.23 mode)
Baud Rate (set by UART and Xtal frequency)
Mark (Logical 1) Frequency
Space (Logical 0) Frequency
Tx 1200bits/sec (Bell 202 mode)
Baud Rate (set by UART and Xtal frequency)
Mark (Logical 1) Frequency
Space (Logical 0) Frequency
Tx 150bits/sec (Bell 202 mode)
Baud Rate (set by UART and Xtal frequency)
Mark (Logical 1) Frequency
Space (Logical 0) Frequency
Notes
4
Min.
-4.0
-2.0
1194
1297
2097
74
388
448
1194
1197
2197
149
385
485
Typ.
-3.0
0
1200
1300
2100
75
390
450
1200
1200
2200
150
387
487
Max.
-2.0
+2.0
1206
1303
2103
76
392
452
1206
1203
2203
151
389
489
Unit
dBm
dB
Baud
Hz
Hz
Baud
Hz
Hz
Baud
Hz
Hz
Baud
Hz
Hz
Notes:
4. At VDD = 5.0V, Tx o/p level control bit set to ‘1’; load resistance greater than 40kΩ.
2003 CML Microsystems Plc
20
D/624/7
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