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CMX641AD2 View Datasheet(PDF) - CML Microsystems Plc

Part Name
Description
MFG CO.
CMX641AD2
CML
CML Microsystems Plc CML
'CMX641AD2' PDF : 26 Pages View PDF
Dual SPM/Security Detector/Generator
CMX641A
D10-D9 (Channel 2)
D3-D2 (Channel 1)
00
01
10
11
Lower
Will Not Detect
15.36kHz (-4.0%)
15.12kHz (-5.5%)
14.80kHz (-7.5%)
14.40kHz (-10.0%)
Lower
Will Detect
15.76kHz (-1.5%)
15.52kHz (-3.0%)
15.20kHz (-5.0%)
14.80kHz (-7.5%)
Upper
Will Detect
16.24kHz (+1.5%)
16.48kHz (+3.0%)
16.80kHz (+5.0%)
17.20kHz (+7.5%)
Upper
Will Not Detect
16.64kHz (+4.0%)
16.88kHz (+5.5%)
17.20kHz (+7.5%)
17.60kHz (+10.0%)
Table 5 Setting 16kHz Will Detect/Will Not Detect Bandwidths in
Enhanced Features Operating State
The CMX641A will always respond to valid inputs between the Lower ‘Will Detect’ and Upper ‘Will Detect’
frequencies inclusive. It will not respond to frequencies at or below the Lower ‘Will Not Detect’ or at or
above the Upper ‘Will Not Detect’. The response and deresponse times will depend upon the output
format chosen, i.e. Tone Follower or Packet output.
System Select
Bits D1 and D0 select the operating frequencies of the CMX641A in Enhanced Features Operating State.
D1-D0
00
01
10
11
Channel 1 Output Channel 2 Output
Detects 16kHz
Detects 16kHz
Detects 16kHz
Detects 12kHz
Detects 16kHz
Detects 12kHz
Detects 12kHz
Detects 12kHz
Amp 1
Input to channel
1
Input to channel
1
Input to channel
1&2
Input to channel
1
Amp 2
Input to channel
2
Input to channel
2
Available as
independent
amplifier
Input to channel
2
Table 6 Setting System Frequencies in Enhanced Features Operating State
The operating frequencies can be set in four ways as shown in Table 6. In three of the four cases,
Amplifier 1 is the input to channel 1 and Amplifier 2 is the input to channel 2. However, when bits
D1-D0 = ‘10’, both channels take their input from Amplifier 1. This makes Amplifier 2 available for
independent use, perhaps as a gain or filter block. However, it should be noted that each channel will
detect its system frequency only in the absence of the other. The device is not designed to be immune to
the presence of the other tone. Each channel will function correctly when either 12kHz or 16kHz, but not
both, is present.
ASK Tone Output
This is output from the TONE OP pin under the control of the TONE ASK input and the TX TONE
SELECT pins. The TONE ASK pin keys the transmit tone on-off. A logic high corresponds to no tone
and logic low to tone. The output frequency is selected by the TX TONE SELECT pin. A logic high
selects 12kHz and logic low selects 16kHz. (See Table 7). The tone output is ramped up to its maximum
level and down to nil output with time constants of TBD and TBD respectively.
TONE
ASK
0
0
1
TX TONE
SELECT
0
1
X
TONE
OP
16kHz
12kHz
BIAS
Table 7 Selecting Transmission Tone in Enhanced Features Mode
© 2002 Consumer Microcircuits Limited
14
D/641A/5
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