CMX850L8 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX850L8' PDF : 103 Pages View PDF
Communications Controller
CMX850
If the time constant of R24 and C22 is large enough then the voltage on RT will remain below the threshold
of the 'B' Schmitt trigger for the duration of a ring cycle.
The time for the voltage on RT to charge from DVSS towards DVDD can be derived from the formula:
VRT = DVDD x [1 - exp(-t/(R24 x C22)) ]
As the Schmitt trigger high-going input threshold voltage (Vthi) has a minimum value of 0.56 x DVDD, then
the Schmitt trigger B output will remain high for a time of at least 0.821 x R24 x C22 following a pulse at
RD.
The values of R24 and C22 given in Figure 3 (470kΩ and 0.33µF) give a minimum RT charge time of
100 ms, which is adequate for ring frequencies of 10Hz or above.
Note that the circuit will also respond to a telephone line voltage reversal. If necessary the µC can
distinguish between a Ring signal and a line voltage reversal by measuring the time that bit 14 of the
modem’s Status Register 1 (Ring Detect) is high.
If the Ring detect function is not used then pin RD should be connected to DVSS and RT to DVDD.
1.4.2 Hook Detector Interface
This is identical internally to the Ring Detector interface circuit and similar components could be used
externally, with appropriate values, if hook detection is to be performed by detecting a voltage change
across the tip and ring lines to the local phone.
1.4.3 RESETN pin
When this pin is taken low, it resets the CMX850, which includes the µC and modem. The reset to the
modem performs the same operation as a C-BUS General Reset command. As a consequence the modem
will enter the powersaved state. Refer to section 1.6.11.1 (General Reset Command) and 1.6.11.2 (General
Control Register, Powerup bit) for further information. At the same time as the modem is reset, the µC and
its SFRs will also be reset. No further accesses are made to external memory until the RESETN pin makes
a low to high transition, when program execution will begin from either external memory or internal (local)
BOOT ROM, depending on the duration of the RESETN pulse and the state of the VBIAS pin during the low
to high transition of the RESETN pin. See section 1.4.4 for a more detailed description of local BOOT ROM
execution. On initial power-up, the CMX850 performs a power-on reset which is similar to taking the
RESETN pin low.
The following SFR registers of the µC are not affected by the RESETN pin or a power-up reset. The reason
for not resetting these bits is so that i) the real time clock doesn’t stop when RESETN is asserted, ii) the
user can tell if the watchdog timed out and caused the reset, and iii) established practice is maintained – in
the case of the standard 8051 SFRs.
OBSCON b7..0:
These are cleared by a power-up reset, but are not affected by the RESETN pin.
WDTCON b2:
This bit is cleared by a power-up reset, but is not affected by the RESETN pin.
RTCCON b7 and b3:
These bits are not affected by either power-up reset or RESETN; they are indeterminate on power-up.
© 2003 CML Microsystems Plc
13
D/850/6
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