CMX850L8 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX850L8' PDF : 103 Pages View PDF
Communications Controller
CMX850
1.5.1 Special Function Register Memory Map
The CMX850 microcontroller’s special function register (SFR) area contains the complete set of standard
8051 SFRs, along with the additional SFRs required to control the CMX850’s extra hardware functions.
↓ Bit addressable
(lsb
)
'..... 000'
'..... 001'
'..... 010'
'..... 011'
Standard 80C51 SFRs are shown in parentheses
'..... 100' '..... 101' '..... 110' '..... 111'
$F8
MEMCON RTCCON
TIME0
TIME1
TIME2
TIME3
$F0
(B)
WDTCON WDTLD
ALM0
ALM1
ALM2
ALM3
$E8
CASDET CBUSCON CBUSBUF KBCON
KBSTAT
KBBUF
$E0 (ACC)
ADCCON1 ADCCON2 ADCBUFL ADCBUFH ADCTHRL ADCTHRH
$D8
P5
P5DIR
P5OD
P5RES
PWMCON PWM1
PWM2
$D0 (PSW)
FSKBUF
$C8
$C0
P4
P4DIR
P4OD
P4RES
$B8
(IP)
IP_1
$B0
(P3)
P3DIR
P3OD
P3RES
$A8
(IE)
IE_1
ICON1A ICON1B
$A0
(P2)
$98 (SCON)
(SBUF)
OSCCON SPDCON SPXMASK PDXMASK
$90
(P1)
P1DIR
P1OD
P1RES
P0DIR
TESTCON
$88 (TCON)
(TMOD)
(TL0)
(TL1)
(TH0)
(TH1)
$80
(P0)
(SP)
(DPL)
(DPH)
DPL1
DPH1
DPS
(PCON)
Table 1 Special Function Registers
The CMX850’s SFRs are mapped into the local RAM address space between locations $80 and $FF, and
are accessible by standard 8051 instructions which use direct addressing. SFRs whose address is divisible
by 8 are also accessible using bit-addressing instructions. The TESTCON SFR is used for production test
only and should not be written to under any circumstances. Similarly, any undefined addresses in the table
should not be written to, otherwise device operation may become unpredictable.
1.5.2 Dual Data Pointer
The standard 8051 µC has a single 16-bit data pointer DPTR which can be used to address XRAM or
program memory, using MOVX and MOVC instructions respectively. The DPTR register is also mapped into
two 8-bit SFRs, DPL and DPH. The CMX850 has an additional 16-bit data pointer DPTR1 that can
significantly speed up block moves by allowing 16-bit source and destination pointers to be maintained
simultaneously. DPTR1 is mapped into SFR registers DPL1 and DPH1. A separate SFR register DPS is
used to select between DPTR and DPTR1: all instructions that use the data pointer directly (INC DPTR;
MOV DPTR,#data16; MOVC A,@A+DPTR; MOVX A,@DPTR; MOVX @DPTR,A) will be directed to
whichever data pointer is currently selected by DPS. Swapping between the two data pointers can be easily
achieved by using the increment instruction, INC, to toggle DPS bit 0.
1.5.2.1 DPTR Registers (DPL/DPH, DPL1/DPH1)
DPL: SFR Address $82
All bits cleared to 0 on reset.
Bit:
7
6
5
4
3
2
1
0
DPTR Low Byte
© 2003 CML Microsystems Plc
18
D/850/6
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