CMX867 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX867' PDF : 48 Pages View PDF
Low Power V.22 Modem
CMX867
Rx Mode Register b8: Rx Auto-equalise (DPSK modes)
This bit controls the operation of the receive DPSK auto-equaliser. Set to 0 in FSK modes.
b8 = 1
b8 = 0
Enable auto-equaliser
DPSK mode: Auto-equaliser disabled
Rx Mode Register b7-6: Rx Scrambler (DPSK modes)
These 2 bits control the operation of the Rx descrambler used in DPSK modes. Set
both bits to 0 in FSK modes
b7
b6
1
1
Descrambler enabled, 64 ones detect circuit enabled (normal use)
1
0
Descrambler enabled, 64 ones detect circuit disabled
0
x
Descrambler disabled
Rx Mode Register b5-3: Rx USART Setting (DPSK and FSK modes)
These three bits select the Rx USART operating mode. The 1% and 2.3% overspeed options
apply to DPSK modes only.
b5 b4 b3
1
1
1 Rx Synchronous mode
1
1
0 Rx Start-stop mode, no overspeed
1
0
1 Rx Start-stop mode, +1% overspeed (1 in 8 missing Stop bits allowed)
1
0
0 Rx Start-stop mode, +2.3% overspeed (1 in 4 missing Stop bits allowed)
0
x
x Rx USART function disabled
Rx Mode Register b2-0: Rx Data bits and parity (DPSK and FSK: Start-Stop modes)
In Start-stop mode these three bits select the number of data bits (plus any parity bit) in each
received character. These bits are ignored in Synchronous mode.
b2 b1 b0
1
1
1 8 data bits + parity
1
1
0 8 data bits
1
0
1 7 data bits + parity
1
0
0 7 data bits
0
1
1 6 data bits + parity
0
1
0 6 data bits
0
0
1 5 data bits + parity
0
0
0 5 data bits
Rx Mode Register b2-0: Tones Detect mode
In Tones Detect Mode (Rx Mode Register b15-12 = 0001) b8-3 should be set to 000000
Bits 2-0 select the detector type.
b2 b1 b0
1
0
0 Programmable Tone Pair Detect
0
1
1 Call Progress Detect
0
1
0 2100, 2225Hz Answer Tone Detect
0
0
1 DTMF Detect
0
0
0 Disabled
© 2004 Consumer Microcircuits Limited
27
D/867/5
Share Link: 
