CMX867E2 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX867E2' PDF : 48 Pages View PDF
Low Power V.22 Modem
CMX867
1.5.10.5
Tx Data Register
Tx Data Register: 8-bit write-only.
C-BUS addresses $E3 and $E4
Bit: 7 6 5 4 3 2 1 0
Data bits to be transmitted
In Synchronous Tx data mode this register contains the next 8 data bits to be transmitted. Bit 0 is
transmitted first.
In Tx Start-Stop mode the specified number of data bits will be transmitted from this register (b0 first). A
Start bit, a Parity bit (if required) and Stop bit(s) will be added automatically.
This register should only be written to when the Tx Data Ready bit of the Status Register is 1.
C-BUS address $E3 should normally be used, $E4 is for implementing the V.14 overspeed transmission
requirement in Start-Stop mode, see section 1.5.1.
1.5.10.6
Rx Data Register
Rx Data Register: 8-bit read-only.
C-BUS address $E5
Bit: 7 6 5 4 3 2 1 0
Received data bits
In unformatted Rx data mode this register contains 8 received data bits, b0 of the register holding the
earliest received bit, b7 the latest.
In Rx Start-Stop data mode this register contains the specified number of data bits from a received
character, b0 holding the first received bit.
© 2004 Consumer Microcircuits Limited
28
D/867/5
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