Low Power V.32 bis Modem
CMX869
6.8 Status Register
Status Register: 16-bit read-only. C-BUS address $E6
Bits 13-0 of this register are cleared to 0 by a General Reset command or when b7 (Reset) of the
General Control Register is 1.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
IRQ RD PF TxD TxU
See below for uses of these bits
The meanings of the Status Register bits 10-0 depend on the receive mode.
Status Register bits 15-11: All modes
b15 IRQ.
b14 Set to 1 on Ring Detect
b13 Programming Flag bit. See 6.10
b12 Set to 1 on Tx data ready. Cleared by write to Tx Data Register
b11 Set to 1 on Tx data underflow. Cleared by write to Tx Data Register
0
IRQ
Mask bit
B6
b5
b4
b3
b3
Status Register bits 10-0: Rx Tones Detect modes
b10 Set to 1 when energy is detected in Call Progress band or when both
programmable tones are detected
b9 0
b8 0
b7 Set to 1 when 2100Hz answer tone or when the second programmable
tone is detected
b6 Set to 1 when 2225Hz answer tone or when the first programmable tone
is detected
b5 Set to 1 when DTMF code is detected
b4 0
b3 Rx DTMF code b3, see table following
b2 Rx DTMF code b2
b1 Rx DTMF code b1
b0 Rx DTMF code b0
Status Register bits 10-7: Rx FSK Modem modes
b10 1 while energy is detected in Rx modem signal band
b9 1 while ‘1010..’ pattern is detected
b8 1 while continuous 0s detected
b7 1 while continuous 1s detected
IRQ
Mask bit
b2
b1
b1
b1
b0
b0
-
-
-
-
-
IRQ
Mask bit
b2
b1
b1
b1
Status Register bits 10-7: QAM Modem (V.22, V.22 bis, V.32, V.32 bis) modes
b10 0
b9 Set to 1 by modem event. Cleared by read of QAM modem Status
Register
b8 Set to 1 when V.14 ‘break’ signal detected in Start-Stop mode
b7 0
IRQ
Mask bit
b2
B1
b1
b1
© 2003 CML Microsystems Plc
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